approximate scale 1:1 A3908 description the A3908 is a low voltage bidirectional dc motor driver with a typical input voltage range of 3 to 5.5 v and output currents up to 500 ma. the unique output full-bridge incorporates source- side linear operation to allow a constant voltage across the motor coil. this regulated output minimizes motor voltage change due to i r ds(on) variation and battery voltage tolerance. logic input pins are provided to control the motor direction of rotation, brake, and standby (< 500 na supply current) modes and to allow optional pwm of the sink drivers. internal protection circuitry includes thermal shutdown, undervoltage lockout, and crossover current (shoot-through) protection. the A3908 is supplied in a 2 mm x 2 mm, 0.55 mm nominal height, 8-lead dfn package, with exposed thermal pad (package suffix ee). this small footprint package is lead (pb) free, with 100% matte tin leadframe plating. applications include: ? robotic actuators and pumps ? portable printers/scanners ? camera lens/shutter control ? battery powered toys and games ? low noise test instrumentation systems 3908-ds features and benefits ? constant voltage operation (adjustable) ? 500 ma output peak rating ? low power standby mode ? small 2 mm 2 mm, 0.55 mm nominal height dfn package ? typical input voltage range of 3 to 5.5 v ? adjustable constant voltage or pwm operation ? less than 500 na standby mode current ? ?40 to 85 operating temperature range package: 8 contact dfn (suffix ee) typical application low voltage dc motor driver cpu r1 18 k r2 10 k m outa vset vref A3908 +v bat outb in2 in1 vdd gnd
2 low voltage dc motor driver A3908 2 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com parameter symbol conditions min. typ. max. units supply voltage v dd ??6v logic input voltage range v in ?0.3 ? 6 v output current i out 500 ma junction temperature t j ? ? 150 c storage temperature range t stg ?40 ? 150 c operating temperature range t a range e ?40 ? 85 c selection guide part number packing A3908eeetr-t tape and reel, 3000 pieces/reel absolute maximum ratings
3 low voltage dc motor driver A3908 3 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com functional block diagram outb gnd vdd outa in2 in1 vref vset 1 2 3 4 8 7 6 5 terminal diagram number name description 1 outb motor terminal 2 gnd ground 3 vdd input supply 4 outa motor terminal 5 vset select source-side output voltage 6 vref bandgap reference 7 in1 control logic input 8 in2 control logic input outa outb vdd in1 in2 vbg 10 m f 3 to 5.5v gnd charge pump vref vset r2 r1 3r r 3r r v cp v set outa outb sink drive sink drive control logic (top view)
4 low voltage dc motor driver A3908 4 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com thermal characteristics characteristics symbol test conditions rating unit package thermal resistance * r ja measured on 4-layer board based on jedec standard 49 c/w * additional thermal information is available on the allegro web site. electrical characteristics at t a =25c, and v dd = 3 to 5.5 v, unless otherwise noted characteristics symbol test conditions min. typ. max. units supply current i dd ? 0.5 2 ma i ddstb standby mode ? ? 500 na uvlo enable threshold v dduvlo v dd rising ? ? 2.6 v uvlo hysteresis v uvhys ? 120 ? mv thermal shutdown temperature t jtsd temperature increasing. ? 165 ? c thermal shutdown hysteresis t jhys recovery = t jtsd ? t jhys ?15?c logic input low level v il ??v dd x 20% v logic input high level v ih v dd x 55% ? ? v input hysteresis v hys ?v dd x 7% ? mv logic input current i in v in = 0 to 5 v ?1 0 1 a output driver sink driver output resistance r ds v dd = 5 v, i out = 500 ma ? 0.6 ? v dd = 3 v, i out = 500 ma ? 0.8 ? source driver on resistance r ds(on) v dd = 5 v, i out = 500 ma ? 0.6 ? v dd = 3 v, i out = 500 ma ? 0.65 ? bandgap reference vbg 1.235 1.285 1.335 v v out accuracy (v outa ?v outb )v out v set = 1.2 v 4.608 4.8 4.992 v v set = 825 mv 3.135 3.3 3.465 v v set = 500 mv 1.84 2 2.16 v
5 low voltage dc motor driver A3908 5 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com functional description voltage regulation the A3908 regulates the voltage across the motor coil. the voltage across the outa and outb terminal is sensed and compared to an internal threshold voltage. the high-side switch will be driven in linear mode to keep the applied voltage maintained at the calculated level, as follows: v out = 4 v ref ( r 2 / [ r 1 + r 2 ]) , where v ref (vbg) is 1.285 v typical. then, for forward mode: v out = v outa ? v outb , and for reverse mode: v out = v outb ? v outa . the alternative method is to provide a tightly regu- lated voltage to the motor supply pin and run the source and sink drivers as switches. the voltage drop across these switches will vary linearly with tempera- ture and current, therefore the voltage across the motor coil also will vary. the A3908 will eliminate these sources of error for a system where controlling the motor voltage is the optimum means of control. thermal shutdown the A3908 will disable the out- puts if the junction temperature, t j , reaches 165c. there is 15c of hysteresis, so when the junction temperature drops below 150c, the device will begin to operate normally. dropout mode the source and sink drivers have a total r ds(on) of approximately 1.2 total. when the motor supply voltage, v dd , drops too low compared to the regulated value, the ic enters dropout mode. in this case, the voltage across the motor coil will be: v motor = v dd ? i load ( r ds(sink) + r ds(src) ) brake mode when both inputs are high, the A3908 goes into high-side brake mode (turns on both source drivers). there is no protection during braking, so care must be taken to ensure that the peak current does not exceed the absolute maximum current, i out . standby mode to minimize battery drain, standby mode will turn off all of the circuitry and draw typi- cally less than 100 na from the vdd line. there will be a very short delay, approximately 2 s, before enabling the output drivers after release of standby mode. power dissipation . power can be approximated based on the below three components: p d(src) = i load ( v dd ? v reg ) , p d(sink) = i load r ds(sink) , and p bias = v dd i dd . control logic table settings resulting mode in1 in2 outa outb 0 0 off off standby 0 1 low v reg reverse 10v reg low forward 1 1 high high brake
6 low voltage dc motor driver A3908 6 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com application information A3908 evaluation board layout the printed circuit board should use a heavy ground- plane for optimum thermal performance. the A3908 must be soldered directly onto the board. on the underside of the A3908 package is an exposed pad, which provides a path for enhanced thermal dissipa- tion. the thermal pad should be soldered directly to an exposed surface on the pcb. thermal vias are used to transfer heat to other layers of the pcb. thermal vias should not have any thermal relief and should be con- nected to internal layers, if available, to maximize the dissipation area. grounding in order to minimize the effects of ground bounce and offset issues, it is important to have a low impedance, single-point ground, known as a star ground , located very close to the device. by making the connection between the exposed thermal pad and the groundplane directly under the A3908, that area becomes an ideal location for a star ground point. a low impedance ground will prevent ground bounce r1 vdd in2 in1 gnd gnd gnd r2 cvdd outa u1 outb pad A3908 r1 r2 cvdd 10 m f outb gnd vdd outa in2 in1 vref vset
7 low voltage dc motor driver A3908 7 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com during pwm operation and ensure that the supply voltage remains stable at the input terminal. bulk capacitance is often located at a non-ideal distance from the device. if the recommended capacitance of 10 f cannot be located very close to the supply ter- minal on the A3908, it is recommended that a 0.1 f capacitor be placed as close to the vdd terminal as possible to provide a path for transient currents. pwm operation in some applications current control may be desired. pulse width modulating the inputs will allow the output current to be regulated. when external pwm control is used, the vref pin should be connected directly to the vset pin. this effectively disables voltage control on the source driver, and allows maximum current to flow through the driver. current is then controlled using enable chopping , described below. enable chopping by pwming the logic inputs between enable and brake modes, the current in the motor winding can be controlled. it is accomplished by holding one input high while pwming the other input. during the on-cycle, current flows in the bridge consistent with the direction programmed on the input pins. during the off-cycle, the A3908 enters brake mode. enable chopping is illustrated in figure 1. current in the motor winding is controlled by chang- ing the duty cycle on the pwm input. as shown in figure 2, the average current is still positive but, because the duty cycle is less, the average current is much lower. figure 1. enable chopping. forward direction, output duty cycle 90%. figure 2. enable chopping. forward direction, output duty c ycle 20%. symbol parameter units/division c1 v in1 2 v c2 v in2 2 v c3 i out 100 ma t time 20 s t c3 v in1 c1 c2 v in2 i out symbol parameter units/division c1 v in1 2 v c2 v in2 2 v c3 i out 100 ma t time 20 s t c1 c2 v in1 c3 v in2 i out
8 low voltage dc motor driver A3908 8 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com package ee, 8-contact dfn 1.60 8 8 2 1 2 1 a a terminal #1 mark area b exposed thermal pad (reference only, terminal #1 identifier appearance at supplier discretion) all dimensions nominal, not for tooling use (reference jedec mo-229uccd) dimensions in millimeters exact case and lead configuration at supplier discretion within limits shown c reference land pattern layout (reference ipc7351 son50p200x200x100-9m); all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and pcb layout tolerances; when mounting on a multilayer pcb, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference eia/jedec standard jesd51-5) b pcb layout reference view 0.90 1.60 0.30 1 8 0.50 0.83 2.13 c 0.90 0.55 +0.05 ?0.04 2.00 0.15 2.00 0.15 0.25 0.05 0.325 0.050 0.50 c 0.08 d d coplanarity includes exposed thermal pad and terminals c seating plane 9x copyright ?2008, allegro microsystems, inc. the products described here are manufactured under one or more u.s. patents or u.s. patents pending. allegro microsystems, inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per- mit improvements in the per for mance, reliability, or manufacturability of its products. before placing an order, the user is cautioned to verify that the information being relied upon is current. allegro?s products are not to be used in life support devices or systems, if a failure of an allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. the in for ma tion in clud ed herein is believed to be ac cu rate and reliable. how ev er, allegro microsystems, inc. assumes no re spon si bil i ty for its use; nor for any in fringe ment of patents or other rights of third parties which may result from its use. for the latest version of this document, visit our website: www.allegromicro.com
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